The present invention relates to a method and apparatus for the projection type exposure of fine patterns such as semiconductor circuits, and is particularly concerned with a projection type exposure method and apparatus for achieving an accurately focused status for shallow focus depth exposure light used to expose submicron patterns.
Conventional projection type exposure apparatus, as shown in the Japanese Patent Application Laid-Open No. 58-7136, finds the best focusing location of the reduction lens for each wafer or lot of wafers and offsets the focus. To be more specific, as in the above-noted conventional apparatus, patterns on the mask are detected by a detector which has a slit and is installed on the wafer stage, the height for providing the most intense light is obtained, and exposure is performed for one wafer or one lot with this height being used as the offset.
In the above-noted apparatus of the prior art, no attempt has been made to deal with the subtle variation of the focal surface due to exposure light absorbed in the lens and changed into heat nor the fine deviation of the reduction lens varying with time due to other conditions. Therefore, as the focus margin decreases greatly with the miniaturization of patterns, it is more and more insufficient to obtain focus offset values and perform correction for each wafer or lot of wafers. The true exposure location needs to be obtained for every exposure operation or a plurality of times for one wafer.